Shamelessly ripping off the thread name from [member=2475]Agaton Sax[/member] , here's my take on an 'audiophile Ethernet switch' that's currently being assembled. While initially I didn't subscribe to these things, further reading up revealed some parts of the design that can indeed benefit from improvements. Some made no sense. The ones that made sense, I incorporated onto an existing industrial switch design I had.
Some core features include:
- Enterprise Gigabit Ethernet switch IC from Marvell. This one features extended environmental capabilities and high quality transceivers. External PHY for additional port with an RGMII MAC link.
- Discrete Ethernet magnetics giving improved isolation and less parasitic coupling.
- 4-layer PCB to exploit power plane capacitance by having the power plane acting as an RF capacitor.
- High-precision clock and clock fanout buffer. This reduces strain on the clock recovery circuit by giving less jitter.
- Overall detail to layout and connector placement to maximize performance and minimize coupling.
- EMI cage for the Ethernet switch itself.
- Unmanaged switch, but with limited switch control by MCU: Force 100MBps and Disable Port. The former is to limit link speed to 100Mbps, this reduces clock speeds and thus EMI. The latter is to disable unused ports altogether, to once again reduce emissions and power consumption.
- Linear regulators for all voltage rails except switch core voltage that got a dual-filtered switcing regulator. Dedicated low-noise regulators for Digital 3.3V, switch analog 3.3V, switch analog 1.5V, switch PLL 3.3V, clock. Decoupling with several ranges of ceramic and polymer tantalum.
- Linear discrete regulator for filtering down incoming 12V from barrel jack.
- 2x External SMA connections for master clock slaving of the switch to other compatible devices. In my case, a custom PCIe NIC that I'm developing.
- Compact 100x100mm size, can be used in off-the-shelf extrusions with ground connector ribs at the side. Heatsink at the front for the discrete regulator.
- Basic front-panel indication of power on and all-OK. Rear panel connector LED's indicating link, speed & activities but these can be disabled to reduce EMI.
Top and bottom of the mid-assembly boards:
Some core features include:
- Enterprise Gigabit Ethernet switch IC from Marvell. This one features extended environmental capabilities and high quality transceivers. External PHY for additional port with an RGMII MAC link.
- Discrete Ethernet magnetics giving improved isolation and less parasitic coupling.
- 4-layer PCB to exploit power plane capacitance by having the power plane acting as an RF capacitor.
- High-precision clock and clock fanout buffer. This reduces strain on the clock recovery circuit by giving less jitter.
- Overall detail to layout and connector placement to maximize performance and minimize coupling.
- EMI cage for the Ethernet switch itself.
- Unmanaged switch, but with limited switch control by MCU: Force 100MBps and Disable Port. The former is to limit link speed to 100Mbps, this reduces clock speeds and thus EMI. The latter is to disable unused ports altogether, to once again reduce emissions and power consumption.
- Linear regulators for all voltage rails except switch core voltage that got a dual-filtered switcing regulator. Dedicated low-noise regulators for Digital 3.3V, switch analog 3.3V, switch analog 1.5V, switch PLL 3.3V, clock. Decoupling with several ranges of ceramic and polymer tantalum.
- Linear discrete regulator for filtering down incoming 12V from barrel jack.
- 2x External SMA connections for master clock slaving of the switch to other compatible devices. In my case, a custom PCIe NIC that I'm developing.
- Compact 100x100mm size, can be used in off-the-shelf extrusions with ground connector ribs at the side. Heatsink at the front for the discrete regulator.
- Basic front-panel indication of power on and all-OK. Rear panel connector LED's indicating link, speed & activities but these can be disabled to reduce EMI.
Top and bottom of the mid-assembly boards:
